Gallium Arsenide (GaAs) Wafers

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Gallium Arsenide (GaAs) Wafers

from $1,557.00

Firebird Optics’ Gallium Arsenide (GaAs) wafers are high-purity, single-crystal semiconductor substrates engineered for demanding optoelectronic and high-frequency applications. GaAs is prized for its direct bandgap, high electron mobility, and excellent infrared optical properties, making these wafers ideal for devices such as LEDs, laser diodes, and microwave circuits. Manufactured with precision polishing and doping control, Firebird’s GaAs wafers deliver the material quality and consistency necessary for advanced research and industrial use.

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Gallium Arsenide (GaAs) Wafers: Properties, Manufacturing, and Applications

Overview

Gallium arsenide (GaAs) is a III–V compound semiconductor prized for its direct bandgap, high electron mobility, and strong infrared (IR) optical response. GaAs wafers serve as the foundational substrates for high-performance optoelectronic and radio-frequency (RF) devices where silicon falls short—think laser diodes, VCSELs, high-speed ICs, and multi-junction space solar cells. Available in semi-insulating and conductive forms, GaAs wafers are produced in common diameters of 2″, 3″, 4″, and 6″ with orientations and doping tailored to the target device stack.

Key Material Properties (Room Temperature)

  • Crystal structure: Zinc blende (cubic)

  • Bandgap: ~1.42 eV (direct; ~870 nm)

  • Electron mobility: up to ~8,000 cm²/V·s (doping-dependent)

  • Thermal conductivity: ~55 W/m·K (lower than Si; thermal design matters)

  • Refractive index: ~3.3 (near 1 µm)

  • IR transparency (bulk optics): roughly 0.9–17 µm (opaque in the visible)

  • Resistivity (semi-insulating): typically >10⁷ Ω·cm via EL2/Cr control

These attributes enable fast carrier transport, efficient light emission/absorption near 850–980 nm, and low substrate loss for RF.

How GaAs Wafers Are Manufactured

1) Bulk Crystal Growth

GaAs single crystals are grown from high-purity elements in controlled environments. The dominant methods include:

  • LEC (Liquid Encapsulated Czochralski):
    A GaAs melt is pulled under a boron oxide encapsulant that suppresses arsenic volatilization, yielding large, high-quality ingots.

  • VGF/VB (Vertical Gradient Freeze / Vertical Bridgman):
    The melt solidifies directionally from a seed, offering good diameter uniformity and dislocation control with simpler hardware than LEC.

Semi-insulating GaAs is achieved by carefully managing native defects (notably EL2 centers) or via Cr doping to pin the Fermi level in mid-gap, producing very high resistivity for RF substrates.

Conductive GaAs uses dopants such as:

  • n-type: Si, Te, S

  • p-type: Zn, C, Be (C is common for lower diffusion)

Common wafer orientations are (100) and (111), with offcuts (e.g., 2° toward <110>) used to optimize step morphology for epitaxy (MBE/MOCVD) and mitigate anti-phase-related defects in compound stacks.

2) Ingot Processing & Wafering

  • Cropping & Squaring / Centering: Remove seed/tail, set geometry for slicing.

  • Slicing: Inner-diameter or wire saw produces raw wafers at controlled thickness.

  • Edge shaping: Beveling reduces edge chipping and stress concentration.

  • Lapping & Double-side Polishing (DSP): Achieves flatness (TTV), bow, and warp specs.

  • Chemical-mechanical polishing (CMP): Final “epi-ready” finish with sub-nanometer Ra.

  • Cleaning & Packaging: Solvent and DI sequences, particle control, N₂-purged packaging.

3) Doping, Orientation, and Flat/Notch Standards

  • Doping levels are specified by resistivity or carrier concentration (Hall).

  • Orientation tolerance typically within ±0.1–0.5°.

  • SEMI standards govern flats/notches, chord lengths, and marking for quick identification during fab handling.

4) Quality & Metrology

  • Defect density: Etch pit density (EPD) and X-ray rocking curves benchmark dislocation levels.

  • Thickness/Flatness: TTV, bow, and warp targets depend on device lithography and stepper capability.

  • Surface quality: Haze, micro-scratches, and particle counts are tightly controlled for epi-ready wafers.

  • Electrical: Carrier type/density, mobility, and resistivity (or isolation for semi-insulating).

  • Contamination: Metallic and ionic impurities at ppb–ppm levels verified via TXRF/SIMS.

What GaAs Wafers Do in Devices

Optoelectronics (Direct Bandgap Advantage)

  • Laser diodes & VCSELs (∼650–1,060 nm):
    GaAs substrates host AlGaAs, InGaAs, GaAsP quantum well stacks for data-com, 3D sensing, and precision LIDAR.

  • LEDs (red/IR) & Photodetectors:
    Efficient emission/absorption near the band edge supports low-power, high-speed optical components.

  • Nonlinear & THz Structures:
    GaAs/AlGaAs heterostructures enable frequency conversion and THz emitters/detectors.

RF & High-Speed Electronics (Mobility + Semi-Insulating)

  • pHEMTs / HEMTs and HBTs on GaAs:
    High electron mobility and semi-insulating substrates deliver low parasitics, low loss, and high fT/fmax for power amplifiers, LNAs, and switches in handsets, Wi-Fi, and SATCOM.

  • MMICs:
    Mature GaAs MMIC processes provide excellent linearity and power efficiency across GHz to tens of GHz.

Photovoltaics & Power Conversion

  • III–V Multi-junction Solar Cells (often on Ge with GaAs junctions):
    GaAs-based junctions offer high efficiency under concentration and in radiation-hard space environments.

Infrared Optics (Bulk GaAs as an Optical Material)

  • IR windows & optics (mid-IR):
    While the wafer form is mainly for electronics/optoelectronics, GaAs also serves as an IR optical material (0.9–17 µm) in separate optical-grade forms for spectroscopy and thermal imaging systems.

Typical Wafer Options & Specs (Illustrative)

  • Diameters: 2″, 3″, 4″, 6″

  • Thickness: 350–625 µm (process-dependent)

  • Type: Semi-insulating (EL2/Cr), n-type (Si/Te), p-type (Zn/C)

  • Orientation: (100) ±0.1–0.5°, optional 2° off <110>

  • Flatness: Bow/warp ≤ a few tens of µm (diameter-dependent)

  • Surface: DSP, epi-ready CMP; Ra < 0.5 nm typical

  • EPD: From <5,000 cm⁻² down to premium low-defect offerings (application-specific)

(Actual, shippable specs depend on diameter, growth method, and yield targets.)

Integrating GaAs into Your Process

Epitaxy Compatibility

GaAs pairs seamlessly with MBE and MOCVD to deposit AlGaAs, InGaAs, GaAsP, and superlattices. Offcut selection, V/III ratio, and substrate temperature are critical to manage step-flow growth, interface roughness, and point defects.

Lithography & Etch

GaAs supports advanced photolithography; dry etch chemistries often leverage Cl₂/Ar/BCl₃ systems. Surface passivation (e.g., (NH₄)₂S) mitigates surface states for lower leakage.

Metallization & Contacts

Ohmic and Schottky contacts depend on device type; Au-based stacks are common in RF but require thermal and diffusion management. Au-free options exist for CMOS-compatible lines.

Packaging & Thermal

GaAs’s lower thermal conductivity vs. Si requires careful thermal design: high-conductivity attach, heat spreaders, and package materials to maintain junction temperature margins.

Safety, Handling, and Environmental Notes

  • Toxicology: GaAs contains arsenic. Cutting, grinding, or breaking can generate hazardous particulates. Handle wafers intact; if machining is required, use wet methods, local exhaust, PPE, and compliant waste handling.

  • Storage: Clean, dry, inert packaging; avoid mechanical shock and electrostatic discharge to prevent particle attraction and edge chipping.

  • End-of-life: Follow local regulations for III–V semiconductor disposal and recycling streams.

Where GaAs Shines (Application Snapshots)

  • Datacenter/AI optics: 850–980 nm VCSEL arrays for short-reach links and 3D sensing.

  • Handsets & Wi-Fi front-ends: GaAs pHEMT/HBT power amplifiers and switches for linearity and efficiency.

  • Automotive LIDAR & industrial sensing: High-power edge-emitters on GaAs.

  • Space PV: Radiation-tolerant GaAs-based junctions in multi-junction solar panels.

  • Defense & SATCOM: Low-loss, high-power GaAs MMICs at microwave bands.